SKYSPIN
Architecture of 8086
The following diagram depicts the architecture of a 8086 Microprocessor −
Memory segmentation:
- To increase execution speed and fetching speed, 8086 segments the memory.
- It’s 20 bit address bus can address 1MB of memory, it segments it into 4 64kB segments.
- 8086 works only with four 64KB segments within the whole 1MB memory.
Functional units of 8086
8086 contains two independent functional units: a Bus Interface Unit (BIU) and an Execution Unit (EU).
Bus Interface Unit (BIU)
The segment registers, instruction pointer and 6-byte instruction queue are associated with the bus interface unit (BIU).
The BIU:
- Handles transfer of data and addresses,
- Fetches instruction codes, stores fetched instruction codes in first-in-first-out register set called a queue,
- Reads data from memory and I/O devices,
- Writes data to memory and I/O devices,
- It relocates addresses of operands since it gets un-relocated operand addresses from EU. The EU tells the BIU from where to fetch instructions or where to read data.
It has the following functional parts:
- Instruction Queue: When EU executes instructions, the BIU gets 6-bytes of the next instruction and stores them in the instruction queue and this process is known as instruction pre fetch. This process increases the speed of the processor.
- Segment Registers: A segment register contains the
addresses of instructions and data in memory which are used by the
processor to access memory locations. It points to the starting address
of a memory segment currently being used.
There are 4 segment registers in 8086 as given below:- Code Segment Register (CS): Code segment of the memory holds instruction codes of a program.
- Data Segment Register (DS): The data, variables and constants given in the program are held in the data segment of the memory.
- Stack Segment Register (SS): Stack segment holds addresses and data of subroutines. It also holds the contents of registers and memory locations given in PUSH instruction.
- Extra Segment Register (ES): Extra segment holds the destination addresses of some data of certain string instructions.
- Instruction Pointer (IP): The instruction pointer in the 8086 microprocessor acts as a program counter. It indicates to the address of the next instruction to be executed.
Execution Unit (EU)
- The EU receives opcode of an instruction from the queue, decodes it and then executes it. While Execution, unit decodes or executes an instruction, then the BIU fetches instruction codes from the memory and stores them in the queue.
- The BIU and EU operate in parallel independently. This makes processing faster.
- General purpose registers, stack pointer, base pointer and index registers, ALU, flag registers (FLAGS), instruction decoder and timing and control unit constitute execution unit (EU). Let's discuss them:
OR
Execution unit gives instructions to BIU stating from where to fetch
the data and then decode and execute those instructions. Its function is
to control operations on data using the instruction decoder & ALU.
EU has no direct connection with system buses as shown in the above
figure, it performs operations over data through BIU.
Let us now discuss the functional parts of 8086 microprocessors.
ALU
It handles all arithmetic and logical operations, like +, −, ×, /, OR, AND, NOT operations.
Flag Register
It is a 16-bit register that behaves like a flip-flop, i.e. it
changes its status according to the result stored in the accumulator. It
has 9 flags and they are divided into 2 groups − Conditional Flags and
Control Flags.
Conditional Flags
It represents the result of the last arithmetic or logical instruction executed. Following is the list of conditional flags −
- Carry flag − This flag indicates an overflow condition for arithmetic operations.
- Auxiliary flag − When an operation is performed at ALU, it results in a carry/barrow from lower nibble (i.e. D0 – D3) to upper nibble (i.e. D4 – D7), then this flag is set, i.e. carry given by D3 bit to D4 is AF flag. The processor uses this flag to perform binary to BCD conversion.
- Parity flag − This flag is used to indicate the parity of the result, i.e. when the lower order 8-bits of the result contains even number of 1’s, then the Parity Flag is set. For odd number of 1’s, the Parity Flag is reset.
- Zero flag − This flag is set to 1 when the result of arithmetic or logical operation is zero else it is set to 0.
- Sign flag − This flag holds the sign of the result, i.e. when the result of the operation is negative, then the sign flag is set to 1 else set to 0.
- Overflow flag − This flag represents the result when the system capacity is exceeded.
Control Flags
Control flags controls the operations of the execution unit. Following is the list of control flags −
- Trap flag − It is used for single step control and allows the user to execute one instruction at a time for debugging. If it is set, then the program can be run in a single step mode.
- Interrupt flag − It is an interrupt enable/disable flag, i.e. used to allow/prohibit the interruption of a program. It is set to 1 for interrupt enabled condition and set to 0 for interrupt disabled condition.
- Direction flag − It is used in string operation. As the name suggests when it is set then string bytes are accessed from the higher memory address to the lower memory address and vice-a-versa.
General purpose register
There are 8 general purpose registers, i.e., AH, AL, BH, BL, CH, CL,
DH, and DL. These registers can be used individually to store 8-bit data
and can be used in pairs to store 16bit data. The valid register pairs
are AH and AL, BH and BL, CH and CL, and DH and DL. It is referred to
the AX, BX, CX, and DX respectively.
- AX register − It is also known as accumulator register. It is used to store operands for arithmetic operations.
- BX register − It is used as a base register. It is used to store the starting base address of the memory area within the data segment.
- CX register − It is referred to as counter. It is used in loop instruction to store the loop counter.
- DX register − This register is used to hold I/O port address for I/O instruction.
Stack pointer register
It is a 16-bit register, which holds the address from the start of
the segment to the memory location, where a word was most recently
stored on the stack.
0 Comments